The invention relates to techniques for chopper-stabilizing a delta-sigma modulator to improve the conversion accuracy thereof, and more particularly to reducing conversion inaccuracies caused by intermodulation between chopper clock signals and the delta-sigma modulator output which causes high frequency "tones" to be aliased back to the base band of the delta-sigma modulator.
By way of background, the closest prior art is believed to include the combination of the assignee's U.S. Pat. No. 5,703,589 (Kalthoff et al.) issued Dec. 30, 1997, incorporated herein by reference and U.S. Pat. No. 5,115,202 (Brown) issued May 19, 1992. FIGS. 2A and 2B of U.S. Pat. No. 5,703,589 show a differential chopper-stabilized delta-sigma analog-to-digital converter. The first integrator of the delta-sigma modulator is shown in FIG. 2A of the '589 patent. The differential input signals to operational amplifier 18 are alternately reversed or swapped by fixed-frequency chopper signals .phi..sub.CHA and .phi..sub.CHB, which are shown in FIG. 3 of the '589 patent. Similarly, the differential output signals produced by operational amplifier 18 also are alternately swapped in response to the same fixed-frequency chopper clock signals. This known chopping technique shifts DC offset and low frequency noise signals to a higher frequency equal to or close to the fixed frequency of the chopper clock signals. Such shifted offset and noise signals then are filtered out by a digital filter circuit.
A shortcoming of the foregoing chopper stabilization technique is that there inevitably is parasitic coupling between the fixed-frequency chopper clock signal and the delta-sigma modulator output containing high frequency "tones" when the analog input is at certain DC levels. This parasitic coupling, also referred to as "intermodulation", produces low frequency "images" of the high frequency tones within the base band of the delta-sigma modulator. The image signals within the base band cause conversion inaccuracy.
Note that even though one could choose a different chopping clock frequency, one will inevitably have a tone problem at certain input DC levels. This is because the frequency of a high frequency tone is a function of the DC level of the input signal level. When the high frequency tone moves close to the chopping frequency, intermodulation will bring the high frequency tone into the base band.
Above mentioned U.S. Pat. No. 5,115,202 discloses use of a pseudo-random frequency chopper clock generation circuit 12 that swaps the differential inputs and outputs of an operational amplifier, to thereby chopper stabilize the DC input offset and low frequency noise signals of the differential input signal. The pseudo-randomization of the chopper clock signal frequency effectively "spreads" chopper clock noise energy throughout the frequency spectrum, and thereby reduces the intermodulation between the amplifier input signal and the chopper clock signal which causes a side image of the input signal.
There remains an unmet need for a way of avoiding conversion errors caused in a delta-sigma analog-to-digital converter by intermodulation between a chopper stabilization clock signal and high frequency tones in the output of the delta-sigma modulator.